JVET-L0012 JVET AHG report: High-level parallelism and coded picture regions (AHG12) [T. Ikai, M. Coban, M. M. Hannuksela, H. M. Jang, R. Sjöberg, R. Skupin, Y.-K. Wang]

This document summarizes the activity of AHG12: High-level parallelism and coded picture regions between the 11th meeting Ljubljana, SI (10–18 July 2018) and the 12th meeting in Macao, CN (3–12 October 2018).

The AHG used the main JVET reflector, jvet@lists.rwth-aachen.de, with [AHG12] in message headers. No emails were exchanged in the reflector.

Input documents related to AHG12 were summarized as follows.

• JVET-L0110 On VVC HLS architecture and bitstream structure, S. Wenger (Tencent), Y.-K. Wang (Huawei), M. M. Hannuksela (Nokia), R. Sjöberg (Ericsson), S. Deshpande (Sharp)
• JVET-L0114 On slicing and tiling in VVC, Y.-K. Wang, Hendry, J. Chen, M. Sychev (Huawei), M. M. Hannuksela (Nokia)
• JVET-L0127 On VVC tile design, Yong HE, Yan Ye, Ahmed Hamza (InterDigital)
• JVET-L0182 Design goals for tiles, M. M. Hannuksela, A. Zare, M. Homayouni, R. Ghaznavi-Youvalari, A. Aminlou (Nokia)
• JVET-L0227 AHG 12: Sub-bitstream extraction/merging friendly slice address signalling
• JVET-L0306 On slices and tiles, M. M. Hannuksela (Nokia)
• JVET-L0359 AHG12: Flexible tile partitioning, Y. Yasugi, T. Ikai (Sharp)
• JVET-L0374 On Tile Information Signalling for VVC, S. Deshpande, Y. Yasugi (Sharp)
• JVET-L0394 On Conflicting Use of Tiles, Stephan Wenger
• JVET-L0415 Tile groups for VVC, R.Sjöberg, M. Damghanian, M. Pettersson (Ericsson)

The AHG recommended:

• To review all related contributions
• To discuss the followings in the meeting and reach basic or initial agreement on
  • Bitstream structure (e.g. necessity of slices, header structures for tiles/pictures)
  • Independent decoding picture regions and its extraction property (e.g. motion constrained tile sets)
  • Tile partitioning structure