JVET-L0227 AHG 12: Sub-bitstream extraction/merging friendly slice address signalling [R. Skupin, Y. Sanchez, K. Sühring, T. Schierl, T. Wiegand (HHI)]

The extraction or merging of MCTS sub-bitstreams in HEVC is cumbersome, as potentially all slice headers need to be rewritten. This document proposes changes to the slice_address signalling in VVC in order to allow extraction or merging of MCTS based sub-bitstreams without the necessity of slice header changes.

The proposal is to signal slice addresses in slice headers

• relative to the first CTU of a tile
• in tile scan order
• code slice address depending on tile size

wherein a “tile” refers to a rectangular group of CTUs.

The “final” slice addresses in raster scan order within the picture are derived through adding a per-tile slice base address given from the tiling structure. As there is currently no tiling syntax in VVC, the presented syntax changes rely on an HEVC-style tiling syntax.

As the current VVC design requires parameter set parsing for access unit boundary detection, this document in addition proposes to integrate an access unit delimiter NAL unit and to mandate its use when the proposed slice address signalling scheme is enabled.

Some of this is about how traditional slices can be used with tiles, i.e., how to deal with multiple slices in a tile. It is generally focused on slices that don’t cross tile boundaries but rather lie within individual tiles. At the moment, such a form of traditional slices are not planned to be supported in VVC.

It was agreed that we should keep this approach in mind if we choose to go back on the idea of not supporting multiple slices within tiles.