JVET-AO0148 AhG11 Overflow aware neural-network model quantization [E. Alshina, T. Solovyev (Huawei)]

This contribution provides details of overflow aware neural network quantizer which guarantees bit-exact behaviour and so device interoperability. Additionally to quantizing to integer values neural network the sum of model parameters’ absolute values must not exceed ration between max values of accumulation register and temporal buffer. It was recommended to conduct theoretical analysis for dynamic range of neural-network based algorithms and provide mathematical proof ensure bit-exact behaviour as condition for adoption to the standard draft (if any neural-network based tool is considered).

Notes were recorded by F. Galpin.

Similar methodology to what is done in legacy video codec design is used: design the operations for the worst case inputs in term of accumulation/overflow. It is part of the training process.

The proponent was asked for testing the training integration on current NNVC tools. Currently, this was not tried but believed to be possible with NNLF tools.

The proponent recommended to conduct theoretical analysis for dynamic range of neural-network based algorithms and provide mathematical proof ensure bit-exact behaviour as condition for adoption to the standard draft.

JVET-AO2041 Announcement of JVET AHG17 Meeting in Aachen, DE, 25-27 February 2026 [J.-R. Ohm, M. Wien] (2026-02-06)

Meeting will be hybrid.

Experts with need to request for Schengen visa might want to contact J.-R. Ohm and M. Wien as soon as possible.

Future meeting plans, expressions of thanks, a.o.b., and closing of the meeting

The draft of the WG 5 recommendations (see Annex C) was reviewed and approved in JVET at 1630–1645 on Friday 23 January.

Future meeting plans were established with the following general guidelines (assuming face-to-face meetings):

• Meeting under ITU-T SG21 auspices when it meets (ordinarily starting meetings on the Monday, Tuesday or Wednesday of the first week and closing it on the Wednesday of the second week of the SG21 meeting – a total of 8-10 meeting days), and
• Otherwise meeting under ISO/IEC JTC 1/‌SC 29 auspices when its MPEG WGs meet (ordinarily starting meetings on the Wednesday, Thursday or Friday prior to the main week of such meetings and closing it on the same day as other MPEG WGs – a total of 8–10 meeting days).

In cases where an exceptionally high workload is expected for a meeting, an earlier starting date may be defined, or AHG meetings might be scheduled prior to the meeting. In cases of online meetings, no sessions should be held on weekend days, such that meetings would typically start two days earlier.

Some specific future meeting plans were established as follows:

• During 24 April – 1 May 2026, 42^nd meeting under ISO/IEC JTC 1/‌SC 29 auspices in Santa Eulària, ES, to be conducted as hybrid meeting,
• During 7 – 15 July 2026, 43^rd

JVET-AO0178 [AHG11] Stable float convolution for neural network inference [H. Zhang, F. Cricri, N. Le, N. Zou, B. Koyuncu, L. Murn (Nokia)]

This document proposes a mechanism for using a floating-point data format in convolution operations. It is reported that the proposed mechanism can achieve bit-exact reproducibility across different computation environments and that it completely avoids overflows. The proposed method uses the mantissa bits and sign bit of floating-point numbers in convolution calculations, while keeping bias addition and ReLU/PReLU operations in real floating-point numbers. Float32 is the only data format for hardware performing neural network inference. It is reported that the proposed method, applied to the NNLF in NNVC software, achieves similar performance as the floating-point and int16/int32 format using the SADL library, with about 20% of decoding time when the NNLF is run on a GPU and the rest on a CPU for class B sequences.

The authors would like to donate the SW to NNVC, as an optional NN inference mechanism, so JVET experts can study the mechanism further and can choose to report runtimes with neural network-based coding tools running on GPU in addition to CPU.

IEEE 754 specifies float point arithmetic, but summation of more than two summands and overflow are not deterministic.

Inputs of quantized convolutions are quantized: weights are quantized off-line, but temporal buffer values are quantized during inference. During the inference it is needed to compute maximum abs value for input (whole tensor).

Conceptually the same as JVET-AO0148,...