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16th Meeting: Geneva, October 2019 2019-09-30 14:28
Non-CE6 / Non-CE3: MIP UP TO 64x64 CU’s
Authors: Karam Naser InterDigital Tangi Poirier InterDigital Fabrice Le Léannec InterDigital Franck Galpin InterDigital
Abstract
Due to the adoption of JVET- O0545, the maximum transform size changes between 64x64 and 32x32 depending on the SPS flag sps_sbt_max_size_64_flag. This change impacted the use of MIP, since MIP is allowed up to the maximum tranform size. That is, when sps_sbt_max_size_64_flag is zero, MIP is allowed up to CU sizes 32x32. This contribution proposes to remove this restriction since it does not solve any VPDU or memory issue. In essense, MIP is applied to CU’s up to size 64x64 regardless of maximum transform size, and TU tiling is performed if CU is larger than TU. The BD rate change is reported as
Meeting Notes
JVET-P0352 Non-CE6 / Non-CE3: MIP UP TO 64x64 CU’s [K. Naser, T. Poirier, F. Le Léannec, F. Galpin (InterDigital)]

See the notes under JVET-P0702 – this was handled in the CE3 context.

Cited:
JVET-P0026 JVET-P0702 JVET-P0747 X JVET-P0831 X JVET-P0969 JVET-P0997 X
PATENTS:
WO2022200130A1 1.00 2022-09-29 EP4029270A1 1.00 2022-07-20 EP4218240A1 0.34 2023-08-02 WO2023118048A1 0.32 2023-06-29 WO2024002846A1 0.30 2024-01-04 EP4602805A1 0.24 2025-08-20 WO2022223312A1 0.22 2022-10-27 WO2025002781A1 0.20 2025-01-02
ARCHIVE v2 :
JVET-P0352-r1.docx JVET-P0352.docx JVET-P0352.XLSM
Decisions
See the notes under JVET-P0702 – this was handled in the CE3 context.
Citation