JVET-L0042 Example restriction flags for VVC [J. Samuelsson (Divideon)]

This contains an example set of restriction flags that, when implemented in the standard, can be used to disable individual coding tools through syntax elements signalled at the highest level of the bitstream, e.g. in the sequence parameter set. The contribution had previously been discussed to some extent in AHG15.

The syntax elements in the provided syntax are grouped together depending on which part of the standard they relate to. That is purely for the purpose of increased readability and reduced overhead. There is no form of hierarchical restrictions applied. The restrictions are intended to affect the decoding process. For example, when disable_transform_cbf is set to 1, there would be no coded block flags present in the bitstream. Some restrictions would result in bypassing a processing step (such as disable_intra_ref_sample_filter) while others would result in a simple “fallback” alternative is used (such as using DC prediction if a disable_intra_planar_flag is set to 1), but the the contributor said the intention is that all such fallback methods are simple methods already present in the standard, i.e. there would be no need to add new technology in order to handle the fallback.

The proposed flags are at a low level of granularity – e.g., the proposal lists 9 flags to control individual aspects with the deblocking filter.

It was commented that if there are too many “fallback” cases or too many “micro-level” switches, it could be very difficult to test decoders.

In particular, it was commented that the CABAC engine is an example of a part of the design that tends to be highly optimized in implementations, such that it would be difficult to design a decoder that can support a fine granularity of differences in how CABAC operates.