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6th Meeting: Hobart, March 2017 2017-04-02 01:14
NSST memory reduction

Abstract not available in document

JVET-F0043 NSST memory reduction [S.-H. Kim, H. Jang, J. Lim (LGE)]

This contribution proposes a method to reduce the NSST memory requirement by replacing the third kernels of 8x8 NSST with the first kernels of 4x4 NSST. Specifically, 22 out of 35 third 8x8 kernels are replaced by 4x4 kernels based on intra prediction mode. From experimental results, 0.13% and 0.05% BD-rate increases were reported in AI and RA configuration, respectively, while reducing the NSST memory by 20%.

It seemed not of high importance at this stage to optimize memory usage, in particular if it implies coding losses. Further study was encouraged.

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It seemed not of high importance at this stage to optimize memory usage, in particular if it implies coding losses. Further study was encouraged.
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